European Exascale Processor Memory Node Design
European Exascale Processor & Memory Node Design
ExaNoDe will develop an integrated prototype deploying technology building blocks designed to contribute to the EU drive towards exascale computing. It employs a low-power architecture and advanced nanotechnologies to realise high-performance, high-density computing.
The heterogeneous Multi-Chip-Module (MCM) builds on the following key components:
- ARM-v8 computing architecture;
- 3-D integration (interposer) of System-on-Chips (SoC) for higher compute density combined with high-bandwidth, low-latency data communication interfaces;
- UNIMEM-based advanced memory schemes for high scalability
This ExaNoDe research project is supported by the European Commission under the “Horizon 2020 Framework Programme” with grant Number 671578.
ExaNoDe project participants